It is generally desirable to simulate operations of a hardware system, e.g., an integrated circuit, prior to actually constructing such a system. Simulation is widely used during the development of integrated circuits. One benefit of such simulation may be the detection of design errors in a period, e.g., prior to fabrication, that allows for rapid and low cost resolution of such errors.
A second benefit of simulation is found in enabling the development of a wide variety of tools intended to be utilized with the finished hardware. For example, if an integrated circuit comprises a processor, e.g., a stored program computer, the use of simulation may enable the development of software tools, e.g., compliers for high level programming languages, to begin prior to the completion and availability of the integrated circuit. Such tools may then be advantageously made available earlier than if their development was delayed until the integrated circuit was available.
A third benefit of simulation enables the simulated execution of software intended for use on or with the system. Such simulated execution of target software may identify opportunities for optimization of the hardware design at a point in time that allows for design changes that incorporate such optimizations.
Most simulation systems comprise an investigative agent that allows a user to temporarily suspend the simulation in order to investigate or query the state of the simulated hardware and/or software “running” on the simulated hardware. Such investigative agents are frequently known as or referred to as “debuggers,” and are commonly utilized in a simulation process. An investigative agent or debugger typically interrupts simulation, e.g., at a particular clock cycle or a software breakpoint. A user is then able to observe various hardware and/or software states within the simulation.
It is becoming increasingly common for hardware systems, including integrated circuits, to comprise multiple processor instances. For example, many mobile phones utilize a single integrated circuit that comprises both a digital signal processor (DSP) and a general purpose processor or central processing unit (CPU). In addition, “multi-core” general purpose processors are available. The operation of such multiple processors is frequently closely coupled, and it is therefore highly desirable to simulate the operation of such multiple processors together. It is appreciated that it is often desirable to simulate the operation of non-processor hardware as well, e.g., together with one or more processors.
Under the conventional simulation art, in general, simulation is performed in a sequential manner. For example, in simulating a two-processor system, the actions and events, e.g., executing an instruction, of one processor are simulated, and then the actions and events of the other processor are simulated. It is appreciated that such a simulation occurs sequentially, e.g., first one and then the other, even though the actual target operation may involve parallel operations, e.g., the actions of both processors are to occur at the same time (within the target hardware).
Unfortunately, this sequential nature of simulation usually results in an inconsistent simulated hardware state at any single point in the simulation. For example, an investigative agent may stop a simulation subsequent to the simulation of a first hardware module, e.g., a first processor, but prior to the simulation of a second hardware module, e.g., a second processor. As a deleterious result, the hardware state of one module does not correspond to the hardware state of another module during an investigation. Thus, the value of simulating a system comprising multiple modules is diminished.